Renesas Electronics Develops New Flash Memory Technology

Renesas Electronics Corporation (6723.T), a premier provider of cutting edge semiconductor Solutions declared the advancement of another glimmer memory innovation that accomplishes bigger memory limits, higher readout speeds, and over-the-air (OTA) support for car microcontrollers (MCUs) utilizing the Next Generatoin 28nm process.

Renesas presented this innovation at the 2019 Symposia on VLSI Technology and Circuits in Kyoto, Japan, 9-14 June 2019. Currently the new innovation. This new innovation accomplishes the business’ biggest limit capacity of inserted flash memory on a MCU – 24 MB – and achieves 240 MHz arbitrary access read speeds, the industry’s quickest for installed flash memory. The innovation likewise accomplishes low commotion compose activities when performing OTA wireless Software updates, and high speed and strong task for OTA software updates.

The recently developed flash memory innovation tends to demands with: 

24 MB on-chip flash memory – the Industry biggest in an MCU

Renesas keeps on receiving the high speed, high-dependability SG-MONOS (note 1) innovation for the installed flash memory utilized in its MCUs. The memory cell size of the 28nm age created here is diminished by in excess of 15 percent, from the previous 0.053 µm² to littler than 0.045 µm². While smothering increments in the chip measure, this new innovation permits the incorporation of 24 MB of code stockpiling flash memory, the industry’s biggest capacity with respect to implanted flash memory. Renesas has additionally included 1 MB of information stockpiling flash memory in the test chip for parameters and other information.

Development of noise-reducing technology

By changing the write current applied to each memory cell between initial operation and later operation when programming the flash memory, Renesas has reduced the peak current consumption from the external power supply (Vcc) by 55 percent without reducing the throughput compared to earlier Renesas devices. This suppresses the adverse influence of supply voltage noise on the MCU itself during OTA operations when the car is running. Renesas has also applied the idea of varying the write current to high-speed write mode, in which the number of simultaneously programmed cells is increased. As a result, the new device achieves high-speed programming at 6.5 MB/s in this mode. This makes it possible to suppress the increased test times associated with the large memory capacity.

240 MHz random access read speed – the industry’s highest speeds for MCUs with embedded flash memory

Word line division is an effective method for increasing the speed of random access reads in embedded flash memory. However, this division increases the number of word line drivers and causes reliability degradation due to time-dependent dielectric breakdown (TDDB) of the transistors included in those drivers and word line supply voltage drops due to increased leakage current. Renesas resolved these issues using word line driver stress mitigation and distributed word line supply voltage drivers and has verified 240 MHz high-speed random access, the industry’s highest in a test chip, over a wide temperature range (junction temperatures from -40°C to 170°C).

Since it is important to guarantee constant execution given the expansion of new capacities, for example, functional safety, quicker arbitrary access read times from the flash memory are additionally unequivocally wanted. Besides, in regards to OTA, three things are strongly desired.

First is a low-commotion plan with the goal that the refreshed programming can be put away dependably notwithstanding when the vehicle is working. Second is decreased downtime during the product software switching. Third is robustness to stay away from wrong tasks regardless of whether inadvertent interferences occur when updating or switching software.


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